The present disclosure relates to an analog-to-digital converter (ADC) and, in particular to a massively parallel single slope ADC (SS-ADC).
Over the last few years, electro-optical sensors have been developed that incorporate increasingly higher resolution. Such detectors may have different operations modes or settings that need to be stored or altered.
In particular, such sensors may include an ADC comprised of a read-out integrated circuit (ROIC), a counter and a latch that stores a counter value related to the input to the sensors, such as pixels. In more detail, conventional SS-ADC designs use a ROIC that has a comparator output that is connected to a counter memory element (e.g., a latch) to cause a counter value to be stored into the memory element. In a read-while-integrating type of ROIC, a storage capacitor is periodically charged for a predetermined amount of time. After this time, a ramp voltage is combined with the voltage on the storage capacitor. A comparator compares the increasing voltage across the capacitor to a reference voltage and when the voltage across the capacitor increases above the reference voltage threshold, the output of the comparator changes state or can output a pulse depending on configuration.
A greycode counter begins counting and counts up as the ramp voltage increases. The other input to the comparator is the analog value that needs to be converted to a digital value. A latch or other memory device receives the pulse from the comparator and this causes the greycode counter value to be stored in the latch. Such circuits generally work for their intended purposes but as discussed more fully below, such circuits may have drawbacks when used in low power environments.
The analog-to-digital conversion in ROIC's for imaging applications is usually done at the column level which limits the maximum frame rate achievable. One (or two) row of pixels is converted at the same time. Full frame conversion requires a number of row times dependent of the array size, therefore limiting maximum full frame (further reduced for larger array sizes). That is, the time it takes for a full frame conversion increases as the size of the array is increased.